中圖分類號：TP309 文獻標志碼：A DOI: 10.16157/j.issn.0258-7998.222975 中文引用格式： 龐宇，魏東，王俊超. 基于混沌浮點運算的醫(yī)學圖像加密方法與FPGA實現(xiàn)[J]. 電子技術應用，2023，49(1)：135-140. 英文引用格式： Pang Yu，Wei Dong，Wang Junchao. A medical image encryption method based on chaos floating-point operation and its realization by FPGA[J]. Application of Electronic Technique，2023，49(1)：135-140.
A medical image encryption method based on chaos floating-point operation and its realization by FPGA
Pang Yu1，Wei Dong1，Wang Junchao2
1.Photoelectronic Information Sensing and Transmission Technology Laboratory，Chongqing University of Posts and Telecommunications，Chongqing 400065，China；2.School of Microelectronics and Communication Engineering，Chongqing University，Chongqing 400044，China)
Abstract： Aiming at the high confidentiality requirement of medical image data transmission in the Internet, an encryption method based on Logistic chaotic floating point number operation is proposed for medical image encryption. In this encryption method, PRNG based on Logistic chaos was designed with double-precision floating-point operations and described by the Verilog . The comprehensive design of encryption method is realized on the development platform of Cyclone IV series DE2-115 of Altera Corporation. The security of encryption algorithm is analyzed from the cryptographic perspectives such as key sensitivity test, histogram analysis, correlation test, information entropy processing, etc. By comparing with some existing image encryption algorithms, it is found that the image encrypted by this encryption algorithm has the characteristics of being sensitive to keys, small correlation coefficient and high information entropy. In addition, the FPGA-based hardware encryption system has high encryption stability and good real-time performance.
Key words : image encryption；chaos map；floating point arithmetic；PRNG；FPGA
基于混沌算法的偽隨機數(shù)生成器（Pseudo Random Number Generator , PRNG）生成的偽隨機序列對初始值極度敏感、周期長、密鑰空間大，與其他數(shù)據(jù)序列相比在安全性上具有明顯的優(yōu)勢，用于醫(yī)學圖像加密具有很可觀的加密效果[4]。除了算法嚴格性外，一種有效的加密系統(tǒng)實現(xiàn)技術可保證加密的速度得到提升。而硬件實現(xiàn)的方式在能夠滿足應用實時性的同時又可以防止運行算法的攻擊[5]?，F(xiàn)場可編程邏輯器件（Field -Programmable Gate Array ，FPGA）以其高并行、可定制、能重構、低成本等特點十分適合于混沌加密算法的硬件實現(xiàn)[6]。
