AKM公司的AK4679是一款內(nèi)置麥克風放大器、接收放大器、D類揚聲器放大器、耳機放大器、線性放大器的24位立體聲編解碼音頻DSP芯片。本文詳細介紹了AK4679的主要特性、框圖、應用框圖以及采用AK4679芯片設計的評估開發(fā)板，通過評估板詳細介紹了AK4679芯片各種模式下的應用設置及測試，評估板主要有評估板框圖、電路原理圖。
The AK4679 is a 24bit stereo CODEC and a built-in Microphone-Amplifier,Receiver-Amplifier, Mono Class-D Speaker-Amplifier, Cap-less Class-G Headphone-Amplifier and Line-Amplifier as well as HF/Audio DSP. The AK4679 features AKM DSP core to deal with hands free function for wide band and dual PCM I/F in addition to audio I/F that allows easy interfacing in mobile phone designs with Bluetooth I/F. The playback features also include 5-band Parametric EQ and Dynamic Range Control; therefore the AK4679 can automatically adjust the volume to a comfortable level that has no distortion and provides great flexibility. The AK4679 is available in a 78pin BGA, tilizing less board space than competitive offerings.
AK4679主要特性
?? CODEC&Amp block
1. Recording Function (Stereo CODEC)
• 4 Stereo Input Selectors
• 4 Stereo Inputs (Single-ended) or 3 Mono Input (Full-differential)
• MIC Amplifier: +24dB ~ −6dB, 3dB step
• 2 Output MIC Power Supplies
• Digital ALC (Automatic Level Control): +36dB ~ −54dB, 0.375dB Step, Mute
• ADC CHARACTERISTICS: S/(N+D): 80dB, DR, S/N: 87dB (MIC-Amp=+18dB)S/(N+D): 80dB, DR, S/N: 92dB (MIC-Amp=0dB)
• Stereo Digital MIC Interface
• Wind-noise Reduction Filter
• Stereo Separation Emphasis
• 3-band Programmable Notch Filter
• Audio Interface Format: 24/16bit MSB justified, 24/16bit I2S, 16bit DSP Mode
2. Playback Function (Stereo CODEC)
• Digital Volume (+6dB ~ −57.0dB, 0.5dB Step, Mute)
• Digital ALC (Automatic Level Control): +36dB ~ −54dB, 0.375dB Step, Mute
• Stereo Separation Emphasis
• Dynamic Range Control
• 5-band Parametric Equalizer
• Stereo Line Output (Selectable Full-differential / Single-ended)
• Mono Receiver-Amp
- BTL Output
- Output Power: 60mW @ 32Ω
- Analog Volume: +12 ~ −30dB & Mute, 3dB Step
• Cap-less Stereo Class-G Headphone-Amp
- Output Power: 25mW @ 32Ω, 45mW @ 16Ω
- Analog Volume: +6 ~ −62dB & Mute, 2dB Step
- Zero crossing Detection
- Pop Noise Free at Power-ON/OFF
• Mono Class-D Speaker-Amp
- BTL Output
- Short Protection Circuit
- Output Power: 1.1W @ 8Ω, SVDD=4.2V, THD+N = 10% 0.89W @ 8Ω, SVDD=4.2V, THD+N = 1%
- Analog Volume: +12 ~ −30dB & Mute, 3dB Step
- Pop Noise Free at Power-ON/OFF
• Audio Interface Format:
- 24/16bit MSB justified, 16bit LSB justified, 16/24bit I2S, 16bit DSP Mode
3. Dual PCM I/F for Baseband & Bluetooth Interface
• Four sample Rate Converters (Up sample: up to x6: Down sample: down to x1/6)
• Sample Rate:
- PORTA (Mono): 8 ~ 16kHz
- PORTB (Stereo): 8 ~ 48kHz
• Digital Volume
• Slave Mode
• Audio Interface Format:
- 16bit Linear, 8bit A-law, 8bit μ-law
- Short/Long Frame, I2S, MSB justified
4. Power Management
5. Master Clock(Audio I/F):
(1) PLL Mode
• Frequencies: 11.2896MHz, 12MHz, 12.288MHz, 13MHz, 13.5MHz, 19.2MHz,
24MHz, 25MHz, 26MHz, 27MHz (MCKI pin)
32fs or 64fs (BICK pin)
(2) External Clock Mode
• Frequencies: 256fs, 512fs or 1024fs (MCKI pin)
6. Output Master Clock Frequencies(Audio I/F): 32fs/64fs/128fs/256fs
7. Sampling Frequency (Audio I/F)
• PLL Slave Mode (BICK pin): 8kHz ~ 48kHz
• PLL Master Mode:
8kHz, 11.025kHz, 12kHz, 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, 48kHz
• EXT Master/Slave Mode:
8kHz ∼ 48kHz (256fs), 8kHz ~ 24kHz (512fs), 8kHz ~ 12kHz (1024fs)
8. Audio I/F: Master/Slave mode
?? DSP block
9. Embedded DSP
- Flexible programming with built-in program and data memories
- Hardware accelerator
- Word length: 24bit (Data RAM 24bit floating point)
- Multiplier 20 x 20 ?? 40bit (double precision available)
- Divider 20 / 20 ?? 20bit
- ALU: 44bit arithmetic operation (with overflow margin 4bit)
24bit floating point arithmetic and logic operation
- Program RAM: 4096w x 36bit
- Coefficient RAM: 2048w x 20bit
- Data RAM: 2048w x 24bit (24bit floating point)
- Offset Register: 32w x 15bit
- Delay RAM: 16384w x 24bit (24bit floating point)
- 5625 steps at fs16KHz, 1875 steps at fs48KHz
- Internal clock generator
10. DSP Serial Audio Interface Format
- 24bit Left justified, I2S,
- 16/24 bit linear, 8bit A-law, 8bit μ-law PCM
- Sampling rate 8 KHz ~ 48 KHz
- Up/Down sampling rate converter for Port#2 (8KHz → 16KHz)
11. Operational, sleep, suspend mode
?? General
12. μP I/F: I2C Bus (Ver 1.0, 400kHz Fast Mode), SPI (DSP block only)
13. Ta = −30 ~ 85°C
14. Power Supply:
• SVDD (SPK/RCV/LINE-Amp): 3.0 ~ 5.5V
• AVDD (Analog): 1.7 ~ 2.0V
• DVDD (Digital Core): 1.7 ~ 2.0V
• PVDD (HP-Amp & Charge Pump): 1.7 ~ 2.0V
• TVDDA, TVDDE (Digital I/F): 1.6 ~ 3.6V
• VDDE (DSP Core) 1.1 ~ 1.3V
15. Package : 78pin FBGA(4.5 x 4.5 mm, 0.4mm pitch)
圖1.模擬框圖
圖2.數(shù)字框圖
圖3.DSP框圖
采用AK4679評估板參考設計
The AKD4679-A is an evaluation board for AK4679, 24bit stereo CODEC with Microphone/ Receiver/Headphone/ Speaker/ Line amplifier as well as HF/Audio DSP. The AKD4679-A has the one Digital Audio I/F and two PCM I/F. It can achieve the interface with digital audio systems via optical connector and 10pin Port connector.
AK4679評估板參考設計的主要特性
? DIR/DIT with optical input/output
? 10pin Header for Digital Audio I/F and PCM I/F (Baseband, Bluetooth)
? BNC connector for an external clock input
? 10pin Header for I2C control mode
圖4.參考設計框圖
圖5.參考設計原理圖（1）
圖6.參考設計原理圖（2）
圖7.參考設計原理圖（3）
圖8.參考設計原理圖（4）
圖9.參考設計原理圖（5）
圖9.參考設計原理圖（5）
AK4679評估板參考設計
akd4679-a0-01e.pdf
AK4679數(shù)據(jù)表
ak4679_f01e.pdf
詳情請見:
1.http://www.asahi-kasei.co.jp/akm/en/product/ak4679/akd4679-a0-01e.pdf
和
2.http://www.akm.com/datasheets/ak4679_f01e.pdf
