中圖分類號(hào)： TN432 文獻(xiàn)標(biāo)識(shí)碼： A DOI：10.16157/j.issn.0258-7998.211958 中文引用格式： 谷軍，張國(guó)華，朱曉宇. 10-16位旋變數(shù)字轉(zhuǎn)換器中Sigma-Delta調(diào)制器設(shè)計(jì)[J].電子技術(shù)應(yīng)用，2022，48(3)：45-48. 英文引用格式： Gu Jun，Zhang Guohua，Zhu Xiaoyu. Design of sigma-delta modulator 10-16 bits for resolver digital converter[J]. Application of Electronic Technique，2022，48(3)：45-48.
Design of sigma-delta modulator 10-16 bits for resolver digital converter
Gu Jun1，2，Zhang Guohua1，2，Zhu Xiaoyu2
1.College of Computer Internet of Things Engineering，Jiangnan University，Wuxi 214000，China； 2.The 58th Research Institute of China Electronics Technology，Wuxi 214000，China
Abstract： In this paper, a sigma-delta modulator for 10-16 bit resolver digital converter is designed. The modulator is a second-order structure. On this basis, a chopper modulator circuit is added to eliminate the flicker noise. The dynamic range of the operational amplifier is improved by the charge ratio of the integrator. The VerilogA model of modulator is established by using Spectre tool in Cadence simulation software, and its performance is simulated. In addition, the simulation software MATLAB is used to analyze the FFT spectrum of the modulator, and the simulation results between them are compared. According to the simulation results, the design of the modulator meets the requirements of 10-16 bit converter.
Key words : sigma-delta modulator；spectrum analysis；chopper stabilization
