中圖分類號：TN407 文獻標志碼：A DOI: 10.16157/j.issn.0258-7998.223168 中文引用格式： 張梅娟，辛昆鵬，王麗娟，等. 基于JTAG的高效調試系統(tǒng)設計與實現(xiàn)[J]. 電子技術應用，2023，49(4)：39-43. 英文引用格式： Zhang Meijuan，Xin Kunpeng，Wang Lijuan，et al. Design and implementation of high performance debugging system based on JTAG[J]. Application of Electronic Technique，2023，49(4)：39-43.
Design and implementation of high performance debugging system based on JTAG
Zhang Meijuan，Xin Kunpeng，Wang Lijuan，Deng Jiawei
(The Fifty-Eighth Research Institute of China Electronic Technology Group Corporation， Wuxi 214063， China)
Abstract： A debugging system based on JTAG interface is proposed in this paper to provide an effective and convenient debugging method for domestic processor chip. The debugging system, which is based on JTAG standard, simplifies the design of the on-chip debugging hardware module. With little hardware overhead, simple and high performance design of the debugging instruction, it is used to realize the debugging interrupt, breakpoint and watch point setting，single step running，register or memory read and write, and other base debugging functions, as well as sence protection and recovery, trace buffer, instruction insert execution and other advanced debugging functions. After passed the actual chip testing, the debugging system has compatibility with JTAG protocol, comprehensive functions, high performance, simple structure, convenient for operation and other features.
Key words : debugging system；JTAG protocol；IEEE1149.1；TAP control
片上調試(On-Chip Debugging，OCD)是目前應用最廣泛的一種芯片調試技術，它是一種在芯片內(nèi)部提供相應調試功能模塊的調試技術，目前最流行的OCD技術是JTAG技術。聯(lián)合測試行動小組(Joint Test Action Group，JTAG)是一種國際標準測試協(xié)議IEEE1149.1，主要作用是完成芯片內(nèi)部測試。它具有靈活高效、易于實現(xiàn)等優(yōu)點，是目前使用最為廣泛的調試技術，大規(guī)模應用在各種處理器芯片中。
